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Jeonghyun Choi

MS-Ph.D integrated course student of CSDL

Languages

  • Korean (Native)
  • English (Intermediate)

Interests

  • Electronic Design Automation
  • Security-aware EDA

About Theme

Career Profile

Jeonghyun Choi is currently Master-Ph.D integrated student in the Department of Electrical Engineering in Pohang University of Science and Technology (POSTECH), Korea. He is working with Professor Seokhyeong Kang in CAD & SoC Design Lab(CSDL).

Education

M.S. & Ph.D. in Electrical Engineering

2025.09 - Present
Pohang University of Science and Technology(POSTECH)

B.S. in Electrical Engineering (Summa Cum Laude)

2019.02 - 2025.08
Pohang University of Science and Technology(POSTECH)

Honors & Awards

Best Paper Award, VLSI CAD Division

2026.02
The 33rd Korean Conference on Semiconductors (KCS)

2nd Place (Overall), MLCAD 2025 Contest

2025.09
ACM/IEEE International Symposium on Machine Learning for CAD

Postechian Fellowship (Creativity Track)

2025
BK21 FOUR Graduate School Innovation Program, POSTECH

Newcomb-Lim Capstone Design Award (Best Team)

2025
Dept. of Electrical Engineering, POSTECH

Best Paper Award, Poster Session

2025.01
7th Winter Annual Conference, Institute of Semiconductor Engineers (ISE)

National Science & Engineering Scholarship

2021 - 2025
Korea Student Aid Foundation (KOSAF)

Experiences

Projects

Publications

Skills & Proficiency

Python

C

C++